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Samsung S3C6410 RISC MicroprocessorSimplified Technical Specifications
| Type: |
S3C6410 |
| Manufacturer: |
Samsung |
| Year Released: |
2008 |
| Predecessor: |
32bit Samsung S3C6400 |
Characteristics |
| CPU Structure (complexity): |
RISC |
| Width of Machine Word: |
32 bit |
| Primary (RAM) Data bus: |
32 bit |
Instruction Set |
| Supported Instruction Set(s): |
ARMv6 |
| CPU Core: |
ARM1176JZF-S |
Clock Frequencies |
| Recommanded Minimum Clock Frequency: |
533 MHz |
| Recommanded Maximum Clock Frequency: |
800 MHz |
Caches |
| Level 1 cache: |
16KiB data cache / 16 KiB instruction cache |
Technology |
| Semiconductor Technology: |
CMOS |
| Minimum Feature Size: |
65 nm |
| Contacts: |
424 pins |
| Supply Voltage: |
1.1 V |
Additional Details |
| Special Features: |
16/16KB I/D TCM, 2D/3D Graphics Acceleration (OpenGL ES 1.1/2.0), ARM TrustZone, AHB/AXI bus, 32 channel DMA controller, Instruction and Data Memory Management Units, 32KB secure boot ROM |
| Related Page: |
http://www.samsung.com/global/business/semiconductor/productInfo.do?fmly_id=229&partnum=S3C6410 |
| Datasheet Time: |
Feb 13, 08 18:44:05 |
| Datasheet Views: |
33421 views |
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