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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Allwinner
Type A31s
Year Released 2013
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7
Type of processor core(s)Type and allocation of processor core(s) 4x ARM Cortex-A7 MPcore
Number of processor core(s) quad-core

BusesBuses: 
Memory Interface(s):   LPDDR SDRAM , LPDDR2 SDRAM , DDR3L SDRAM , LPDDR3 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 533 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 8.53 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  NAND Flash Interface


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency N/A

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 1024 Kbyte L2

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 40 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR SGX544 GPU
Number of GPU cores 2-core GPU
GPU Clock 355 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Additional InformationAdditional Information: 
Special Features
quad ARM Cortex-A7 Harvard Superscalar processor core, 32 + 32 Kbyte L1 cache per core, 32-bit dual-channel LP-DDR / 32-bit 1066 Mbps LP-DDR2 / LP-DDR3 / DDR3L memory interface, 8-bit NAND FLASH Controller, 16-channel DMA, 355 MHz PowerVR Series5XT SGX544MP2.. ››

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2013-05-31 11:16
 
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