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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Texas Instruments
Type OMAP 3515
Year Released 2009
FunctionMain function of the component  Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7
Pipeline StagesPipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. 13 pipeline stages
Number of processor core(s) 1
Type of processor core(s)Type and allocation of processor core(s) ARM Cortex-A8

BusesBuses: 
Memory Interface(s):   mobile (LP) DDR SDRAM
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 1 ch
Non-volatile Memory Data Bus WidthMaximum selectable bit width of secondary data (non-volatile storage) bus of memory interface 16 bit
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  NAND Flash Interface , NOR Flash Interface , OneNANDOneNAND is a NAND flash memory interface developed by Samsung
DMA ChannelsDMA (Direct Memory Access) allows direct data transfer between operative memory (RAM) and peripherals (hard disk, non-volatile storage, etc.) bypassing processor core. Multiple DMA channels allows parallel DMA operations. 32 ch


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 600 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 16 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 16 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 256 Kbyte L2

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 65 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component Texas Instruments
PinsNumber of pins on the package 515 pins

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR SGX530 GPU
Number of GPU cores 1-core GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   No
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  No
Supported Audio/Video Interface:   No

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   No

Additional InformationAdditional Information: 
Special Features
NEON SIMD Coprocessor, 64-Ch EDMA, asynchs SRAM support, embedded image signal processor, 112Kbyte ROM, 64Kbyte SRAM, ARM TrustZone, Composite and S-video TV output, SmartReflex Technology, High Speed USB 2.0 On-The-Go support

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2010-07-21 10:03
 
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