PhoneDB - infinitely detailed




FacebookGoogle PlusRSS FeedTwitter

Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Samsung
Type Exynos 5 Quad 5210
Year Released 2013
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7
Type of processor core(s)Type and allocation of processor core(s) 2x ARM Cortex-A15 MPcore + 2x ARM Cortex-A7 MPcore
Number of processor core(s) quad-core

BusesBuses: 
Memory Interface(s):   DDR2 SDRAM , LPDDR2 SDRAM , DDR3L SDRAM , LPDDR3 SDRAM
Number of data bus channels 1 ch
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  eMMC 4.5 , moviNANDmoviNAND is a multimedia card (MMC) controller and onboard firmware developed by Samsung in 2006 , NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 1600 MHz max.

Cache MemoriesCache Memories: 

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 28 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component Samsung

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). N/A

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Additional InformationAdditional Information: 
Special Features
dual ARM Cortex-A15 Harvard Superscalar processor cores + dual ARM Cortex-A7 Harvard Superscalar power-saving processor cores, ARM big.LITTLE architecture, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, dual-channel DDR2, LPDDR2, LPDDR3, DDR3L SDRAM interface, NAND flash, moviNAND, SATA,.. ››

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Incomplete
AddedThe exact time of the datasheet addition 2013-05-15 19:39
 
You are here: Processor Specs \ Samsung Exynos 5 Quad 5210