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 Generel Characteristics |
| Year Released |
2014 |
2016 |
Function |
Multi-core Application Processor with Modem |
Multi-core Application Processor with Modem |
 Architecture |
| Width of Machine Word |
64 bit |
64 bit |
| Supported Instruction Set(s) |
ARMv8 (A32, A64) |
ARMv8 (A32, A64) |
| Type of processor core(s) |
8x ARM Cortex-A53 MPcore |
4x ARM Cortex-A72 MPcore + 4x ARM Cortex-A53 MPcore |
| Number of processor core(s) |
octa-core |
octa-core |
 Buses |
| Memory Interface(s) |
LPDDR3 SDRAM |
LPDDR3 SDRAM |
| Max. Clock Frequency of Memory IF |
800 MHz |
933 MHz |
| Data Bus Width |
32 bit |
32 bit |
| Number of data bus channels |
1 ch |
2 ch |
| Max. Data Rate |
6.4 Gbyte/s |
14.93 Gbyte/s |
| Non-volatile Memory Interface |
eMMC 4.5 |
eMMC 5.1 |
 Clock Frequencies |
| Recommended Maximum Clock Frequency |
1700 MHz max. |
1950 MHz max. |
 Cache Memories |
| Total L2 Cache |
|
1024 Kbyte L2 |
 Technology and Packaging |
| Feature Size |
28 nm |
28 nm |
| Semiconductor Technology |
CMOS |
CMOS |
| Fab |
TSMC |
TSMC |
 Graphical Subsystem |
| Embedded GPU |
Qualcomm Adreno 405 GPU |
Qualcomm Adreno 510 GPU |
| GPU Clock |
550 MHz GPU |
621 MHz GPU |
| Dedicated Graphics Memory |
0.25 MiB |
0.25 MiB |
 Cellular Communication |
| Supported Cellular Data Links |
CSD,
GPRS,
EDGE,
UMTS,
HSUPA,
HSDPA,
HSPA+ 42.2,
DC-HSDPA 42.2,
cdmaOne,
CDMA2000 1x,
CDMA2000 1xEV-DO,
CDMA2000 1xEV-DO Rev A,
CDMA2000 1xEV-DO Rev B,
TD-SCDMA,
LTE,
LTE 150/50 data links |
CSD,
GPRS,
EDGE,
UMTS,
HSUPA,
HSDPA,
HSPA+ 42.2,
DC-HSDPA 42.2,
CDMA2000 1x,
CDMA2000 1xEV-DO,
CDMA2000 1xEV-DO Rev A,
CDMA2000 1xEV-DO Rev B,
TD-SCDMA,
LTE,
LTE 150/50,
LTE 300/50,
LTE 300/100,
LTE 400/150 data links |
 Additional Information |
| Special Features |
octa 64-bit ARM Cortex-A53 MPcore Harvard Superscalar core (max. 1.7 GHz quad-core cluster + max. 1 GHz quad-core cluster), HMP, eMMC 4.51 interface, max. 700 MHz Hexagon V50 DSP, CDMA 2000 1x Adv./DO Rel 0., Rev. A/B, SVDO-DB, GSM, GPRS,.. |
quad 64-bit ARM Cortex A72 Harvard Superscalar cores (max. 1.95 GHz, 1024 Kbyte L2 cache) + quad 64-bit ARM Cortex-A53 MPcore Harvard Superscalar core (max. 1.2 GHz, 512 Kbyte L2 cache), HMP, eMMC 5.1 interface, Hexagon V56 DSP, Qualcomm.. |
 Datasheet Attributes |
| Data Integrity |
Preliminary |
Preliminary |
| Added |
2014-02-24 18:47 |
2016-10-26 15:26 |
Device Specs
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