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Processor Specs: Referred (not editable) comparison sheet [4]

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Qualcomm Snapdragon 810 APQ8094
Qualcomm Snapdragon 821 MSM8996AB Pro
Qualcomm Snapdragon 821 MSM8996AC Pro
Qualcomm Snapdragon 835 MSM8998
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Qualcomm Snapdragon 810 APQ8094
Qualcomm Snapdragon 821 MSM8996AB Pro
Qualcomm Snapdragon 821 MSM8996AC Pro
Qualcomm Snapdragon 835 MSM8998
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Generel CharacteristicsGenerel Characteristics
Year Released 2015 2016 2016 2017
FunctionMain function of the component Multi-core Application Processor Multi-core Application Processor with Modem Multi-core Application Processor with Modem Multi-core Application Processor with Modem

ArchitectureArchitecture
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit 64 bit 64 bit 64 bit
Supported Instruction Set(s) ARMv8-A (A32, A64) ARMv8-A (A32, A64) ARMv8-A (A32, A64) ARMv8-A (A32, A64)
Type of processor core(s)Type and allocation of processor core(s) 4x ARM Cortex-A57 MPcore + 4x ARM Cortex-A53 MPcore 4x Qualcomm Kryo 100 4x Qualcomm Kryo 100 8x Qualcomm Kryo 280
Number of processor core(s) octa-core quad-core quad-core octa-core

BusesBuses
Memory Interface(s) LPDDR4 SDRAM LPDDR4 SDRAM LPDDR4 SDRAM, LPDDR4x SDRAM LPDDR4 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 1866 MHz 1866 MHz 1866 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit 32 bit 32 bit 32 bit
Number of data bus channels 1 ch 2 ch 2 ch 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 29.86 Gbyte/s 29.86 Gbyte/s 29.86 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory eMMC 5.0 eMMC 5.1, UFS 2.0 eMMC 5.1, UFS 2.0 eMMC 5.1, UFS 2.1

Clock FrequenciesClock Frequencies
Recommended Minimum Clock Frequency 200 MHz min.
Recommended Maximum Clock Frequency 1958 MHz max. 2150 MHz max. 2350 MHz max. 2450 MHz max.

Cache MemoriesCache Memories
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache 32 Kbyte I-Cache 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache 32 Kbyte D-Cache 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 4096 Kbyte L2 1536 Kbyte L2 1536 Kbyte L2 2048 Kbyte L2



Technology and PackagingTechnology and Packaging
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 20 nm 14 nm 14 nm 10 nm
Semiconductor Technology CMOS CMOS CMOS CMOS
Number of Transistors Integrated 3100000000
FabPlant which fabricates the semiconductor component TSMC TSMC TSMC Samsung

Graphical SubsystemGraphical Subsystem
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). Qualcomm Adreno 430 GPU Qualcomm Adreno 530 GPU Qualcomm Adreno 530 GPU Qualcomm Adreno 540 GPU
GPU Clock 500 MHz GPU 624 MHz GPU 653 MHz GPU 710 MHz GPU
Dedicated Graphics MemoryDedicated operative memory (video RAM, VRAM) 1 MiB 1 MiB 1 MiB

Cellular CommunicationCellular Communication
Supported Cellular Data LinksList of supported cellular data links No CSD, GPRS, EDGE, UMTS, HSUPA, DC-HSDPA 42.2, CDMA2000 1x, CDMA2000 1xEV-DO, CDMA2000 1xEV-DO Rev A, CDMA2000 1xEV-DO Rev B, TD-SCDMA, LTE, LTE 400/150, LTE 450/100, LTE 600/100 data links CSD, GPRS, EDGE, UMTS, HSUPA, DC-HSDPA 42.2, CDMA2000 1x, CDMA2000 1xEV-DO, CDMA2000 1xEV-DO Rev A, CDMA2000 1xEV-DO Rev B, TD-SCDMA, LTE, LTE 400/150, LTE 450/100, LTE 600/100 data links CSD, GPRS, GPRS C10, GPRS C12, GPRS MSC10, GPRS MSC12, GPRS MSC33, EDGE, EDGE MSC10, EDGE MSC12, EDGE MSC33, UMTS, HSUPA, HSUPA 1.4, HSUPA 2.0, HSUPA 5.8, HSUPA 11.5, HSDPA, HSDPA 1.8, HSDPA 3.6, HSDPA 7.2, HSDPA 10.2, HSDPA 14.4, HSPA+ 21.1, HSPA+ 28.8, HSPA+ 42.2, DC-HSDPA 42.2, cdmaOne, CDMA2000 1x, CDMA2000 1xEV-DO, CDMA2000 1xEV-DO Rev A, CDMA2000 1xEV-DO Rev B, TD-SCDMA, TD-HSDPA, LTE, LTE 50/25, LTE 75/25, LTE 100/50, LTE 150/50, LTE 225/50, LTE 300/50, LTE 300/75, LTE 400/150, LTE 450/50, LTE 450/100, LTE 600/50, LTE 600/100, LTE 1000/100, LTE 1200/200 data links

Additional InformationAdditional Information
Special Features Octa-core ARM big.LITTLE architecture, quad 64-bit ARM Cortex-A57 MPcore Harvard Superscalar cores (up to 1958 MHz) + quad 64-bit ARM Cortex-A53 MPcore Harvard Superscalar cores (up to 1555 MHz), HMP, 1600 MHz dual-channel 64-bit LP-DDR4 SDRAM interface, eMMC 5.0 interface,.. dual Qualcomm Kryo 100 Harvard Superscalar cores (up to 2.15 GHz) + dual Qualcomm Kryo Harvard Superscalar cores, HMP, Hexagon 680 DSP, Qualcomm X12 LTE Modem, CDMA 2000 1x Adv./DO Rel 0., Rev. A/B, SVDO-DB, GSM, GPRS, EDGE, UMTS, DC-HSPA+.. dual Qualcomm Kryo 100 Harvard Superscalar cores (up to 2.35 GHz) + dual Qualcomm Kryo Harvard Superscalar cores, HMP, Hexagon 680 DSP, Qualcomm X12 LTE Modem, CDMA 2000 1x Adv./DO Rel 0., Rev. A/B, SVDO-DB, GSM, GPRS, EDGE, UMTS, DC-HSPA+.. quad Qualcomm Kryo 280 Harvard Superscalar cores (up to 2.45 GHz, 2 Mbyte cluster L2 cache) + quad Qualcomm Kryo Harvard Superscalar cores (up to 1.9 GHz, 1 Mbyte cluster L2 cache), HMP, big.LITTLE, Hexagon 680 DSP, Qualcomm X16 LTE..

Datasheet AttributesDatasheet Attributes
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b Preliminary Preliminary Preliminary Preliminary
AddedThe exact time of the datasheet addition 2015-03-04 18:59 2016-07-15 11:24 2016-10-05 14:58 2016-12-14 22:47

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