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Processor Specs: Referred (not editable) comparison sheet [3]

If you would like to add more datasheets to the comparison table you can still find and add them around the site while browsing, querying or searching Processor Specs. Meanwhile you will not lose the comparison table below. Furthermore unnecassary datasheets can be removed by clicking on the "Remove from comparison" buttons (ever more than one item during one page load) but in this case reloading the table will be needed. Then click again on the appropriate header "Compare" button.
Apple A8X APL1012 (T7001)
Apple A10 Fusion APL1024 / APL1W24 (T8010)
Apple A11 Bionic APL1072 / APL1W72 (T8015)
Use the following link to refer to this comparison
 Apple A8X APL1012 (T7001)
 		Apple A10 Fusion APL1024 / APL1W24 (T8010)
 		Apple A11 Bionic APL1072 / APL1W72 (T8015)
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Generel CharacteristicsGenerel Characteristics
Year Released 2014 2016 2017
FunctionMain function of the component SoC SoC SoC

ArchitectureArchitecture
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit 64 bit 64 bit
Supported Instruction Set(s) ARMv8-A (A32, A64) ARMv8-A (A32, A64) ARMv8-A (A32, A64)
Type of processor core(s)Type and allocation of processor core(s) 3x Apple Typhoon cores 2x Apple Hurricane + 2x Apple Zephyr cores 2x Apple Monsoon + 4x Apple Mistral cores
Number of processor core(s) tri-core quad-core hexa-core

BusesBuses
Memory Interface(s) LPDDR3 SDRAM LPDDR4 SDRAM LPDDR4x SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 800 MHz 2064 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit 64 bit 64 bit
Number of data bus channels 2 ch 2 ch 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 25.6 Gbyte/s 66.05 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory eMMC 5.1, moviNAND, NAND Flash Interface, SATA eMMC 5.1, moviNAND, NAND Flash Interface, SATA eMMC 5.1, moviNAND, NAND Flash Interface, SATA

Clock FrequenciesClock Frequencies
Recommended Minimum Clock Frequency 396 MHz min.
Recommended Maximum Clock Frequency 1500 MHz max. 2370 MHz max. 2376 MHz max.

Cache MemoriesCache Memories
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 64 Kbyte I-Cache 64 Kbyte I-Cache 64 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 64 Kbyte D-Cache 64 Kbyte D-Cache 64 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 2048 Kbyte L2 3072 Kbyte L2 8192 Kbyte L2
Total L3 Cache 4096 Kbyte L3 4096 Kbyte L3



Technology and PackagingTechnology and Packaging
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 20 nm 16 nm 10 nm
Semiconductor Technology CMOS CMOS CMOS
Number of Transistors Integrated 3000000000 3300000000 4300000000
FabPlant which fabricates the semiconductor component TSMC TSMC TSMC

Graphical SubsystemGraphical Subsystem
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR GT7600 Plus GPU
Number of GPU cores 6-core GPU 3-core GPU
GPU Clock 900 MHz GPU

Cellular CommunicationCellular Communication

Additional InformationAdditional Information
Special Features 3x Custom Apple Typhoon 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores, 512 Kbyte L2 cache per core, 4 Mbyte L3 cache, ARM VFPv4, dual-channel 64-bit 800 MHz LP-DDR3-1600 SDRAM interface (25.6 Gbyte/sec), embedded 2 Gbyte LP-DDR3 SD RAM, NAND flash,.. 2x high-performance 2.37 GHz Apple Hurricane 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores + 2x high-efficiency 1.68 GHz Apple Zephyr 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores, HMP, ARM VFPv4, embedded 2 Gbyte or 3Gbyte Samsung LP-DDR4 SD RAM, HDMI,.. TMHS09, 2x high-performance Apple Monsoon 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores + 4x high-efficiency Apple Mistral 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores, HMP, ARM VFPv4, 2 / 3 Gbyte embedded LP-DDR4x SD RAM, HDMI, 2160p video encode,..

Datasheet AttributesDatasheet Attributes
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b Preliminary Preliminary Preliminary
AddedThe exact time of the datasheet addition 2014-10-14 12:56 2016-08-12 14:04 2017-09-12 23:54

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