Generel Characteristics:
|
Designer |
Intel |
Type: |
StrongARM SA-1110 |
Year Released: |
1999 |
Function |
Application Processor |
Architecture:
|
Width of Machine Word |
32 bit |
Supported Instruction Set(s): |
ARMv4 |
Number of processor core(s): |
1 |
Type of processor core(s) |
ARM SA-1 |
Buses:
|
Memory Interface(s): |
EDO DRAM
, SDRAM |
Max. Clock Frequency of Memory IF |
103 MHz |
Number of data bus channels: |
1 ch |
Non-volatile Memory Interface |
No |
Clock Frequencies:
|
Recommended Minimum Clock Frequency: |
39 MHz min. |
Recommended Maximum Clock Frequency: |
206 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core |
16 Kbyte I-Cache |
L1 Data Cache per Core |
8 Kbyte D-Cache |
Number of L1 Cache Ways: |
32-way |
Technology and Packaging:
|
Semiconductor Technology: |
CMOS |
Number of Transistors Integrated: |
2500000 |
Fab |
Intel |
Pins |
256 pins |
Supply Voltage: |
3.3 V |
Graphical Subsystem:
|
Embedded GPU |
N/A |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Satellite Navigation:
|
Supported GPS protocol(s): |
No |
Additional Information:
|
Instruction Execution Performance: |
235 million instruction per |
Instruction Execution Performance Clock Rate: |
206 MHz |
Special Features: 66 MHz / 103 MHz SDRAM interface, 32-emtry MMU, 8-entry Write buffer, 4-entry Read buffer, Flash / SMROM support, 1024x1024 pixel 16-bit/pixel LCD controller, 230 kbps UART, 12 Mbps USB, 4 Mbps IrDA, JTAG, PCMCIA support |
Datasheet Attributes:
|
Data Integrity |
Final |
Added |
2006-01-01 06:00 |