Samsung-Intrinsity Apple A4 APL0398 (S5PC110A01) datasheet

Generel Characteristics:
Designer	Samsung-Intrinsity
Type:	Apple A4 APL0398
Codename:	S5PC110A01
Year Released:	2010
Function	System-On-a-Chip
Collapse datasheet \| Add to compare Architecture:
Width of Machine Word	32 bit
Supported Instruction Set(s):	ARMv7
Pipeline Stages	13 pipeline stages
Number of processor core(s):	1
Type of processor core(s)	Samsung Hummingbird
Buses:
Memory Interface(s):	mobile (LP) DDR SDRAM , mobile (LP) DDR2 SDRAM
Max. Clock Frequency of Memory IF	100 MHz
Data Bus Width	32 bit
Number of data bus channels:	1 ch
Max. Data Rate	0.8 Gbyte/s
Non-volatile Memory Data Bus Width	32 bit
Non-volatile Memory Interface	Yes
DMA Channels	32 ch
Clock Frequencies:
Recommended Minimum Clock Frequency:	800 MHz min.
Recommended Maximum Clock Frequency:	1000 MHz max.
Cache Memories:
L1 Instruction Cache per Core	32 Kbyte I-Cache
L1 Data Cache per Core	32 Kbyte D-Cache
Total L2 Cache	640 Kbyte L2
Technology and Packaging:
Feature Size	45 nm
Semiconductor Technology:	CMOS
Fab	Samsung
Graphical Subsystem:
Embedded GPU	IMG PowerVR SGX535 GPU
Number of GPU cores:	1-core GPU
GPU Clock:	200 MHz GPU
Collapse datasheet Cellular Communication:
Supported Cellular Data Links	No
Satellite Navigation:
Supported GPS protocol(s):	No
Additional Information:
Special Features: Fully ARM Cortex-A8 compatible, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, 2x 128MB integrated DDR SDRAM, NEON SIMD engine, OneDRAM, vector floating point coprocessor (VPU), 32-channel DMA, 1080p full HD codec engine, HDMI 1.3 interface, OpenGL ES 2.0
Datasheet Attributes:
Data Integrity	Preliminary
Added	2010-02-02 22:25

Samsung-Intrinsity Apple A4 APL0398 (S5PC110A01) datasheet

Predecessor

Samsung S5PC100

2009, 32 bit, single-core, 32 Kbyte I-Cache, 32 Kbyte D-Cache, 256 Kbyte L2, 65 nm, Embedded GPU: N/A |