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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Telechip
Type TCC8901
Year Released 2010
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv6
Pipeline StagesPipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. 8 pipeline stages
Number of processor core(s) 1
Type of processor core(s)Type and allocation of processor core(s) ARM1176JZF-S

BusesBuses: 
Memory Interface(s):   Yes
Number of data bus channels 1 ch
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Minimum Clock Frequency 500 MHz min.
Recommended Maximum Clock Frequency 800 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 16 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 16 Kbyte D-Cache

Technology and PackagingTechnology and Packaging: 
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
PinsNumber of pins on the package 400 pins
Supply Voltage 1.5 V

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). ARM Mali-200 GPU

Cellular CommunicationCellular Communication: 

Supported Cellular Data LinksList of supported cellular data links  No

Satellite NavigationSatellite Navigation: 

Supported GPS protocol(s):   No

Additional InformationAdditional Information: 
Special Features ARM946ES sub processor, 16 kbytes SRAM + 16 kbyte Boot ROM, VDS Transmitter, HDMI 1.3, Composite TV-Out (NTSC / PAL), USB 2.0 HS OTG, USB 1.1 HOST, EHI (External Host Interface), 6xUART, I2S Master & Slave Interface, SPDIF TX, UDMA IDE Interface, TS Interface, I2C 2 Channels, GPSB (General Purpose Serial Bus) 6 Channels, SDIO, TSC (Resistive Touch Screen Controller), 12-bit ADC 8 Channel, OpenGL ES 1.1 / 2.0, Open VG 1.1

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2010-07-12 16:45
 
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