Texas Instruments OMAP 3515 datasheet

Generel Characteristics:
Designer	Texas Instruments
Type:	OMAP 3515
Year Released:	2009
Function	Application Processor
Collapse datasheet \| Add to compare Architecture:
Width of Machine Word	32 bit
Supported Instruction Set(s):	ARMv7
Pipeline Stages	13 pipeline stages
Number of processor core(s):	1
Type of processor core(s)	ARM Cortex-A8
Buses:
Memory Interface(s):	mobile (LP) DDR SDRAM
Data Bus Width	32 bit
Number of data bus channels:	1 ch
Non-volatile Memory Data Bus Width	16 bit
Non-volatile Memory Interface	NAND Flash Interface , NOR Flash Interface , OneNAND
DMA Channels	32 ch
Clock Frequencies:
Recommended Maximum Clock Frequency:	600 MHz max.
Cache Memories:
L1 Instruction Cache per Core	16 Kbyte I-Cache
L1 Data Cache per Core	16 Kbyte D-Cache
Total L2 Cache	256 Kbyte L2
Technology and Packaging:
Feature Size	65 nm
Semiconductor Technology:	CMOS
Fab	Texas Instruments
Pins	515 pins
Graphical Subsystem:
Embedded GPU	IMG PowerVR SGX530 GPU
Number of GPU cores:	1-core GPU
Collapse datasheet Cellular Communication:
Supported Cellular Data Links	No
Communication Interfaces:
Supported USB Specification:	No
Bluetooth support	No
Wireless LAN support	No
Supported Audio/Video Interface:	No
Satellite Navigation:
Supported GPS protocol(s):	No
Additional Information:
Special Features: NEON SIMD Coprocessor, 64-Ch EDMA, asynchs SRAM support, embedded image signal processor, 112Kbyte ROM, 64Kbyte SRAM, ARM TrustZone, Composite and S-video TV output, SmartReflex Technology, High Speed USB 2.0 On-The-Go support
Datasheet Attributes:
Related Page:	URL
Data Integrity	Final
Added	2010-07-21 10:03