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Designer![]() |
Ingenic |
Type: | Jz4770 |
Year Released: | 2011 |
Function![]() |
Application Processor |
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Width of Machine Word![]() |
32 bit |
Supported Instruction Set(s): | MIPS32 |
Pipeline Stages![]() |
8 pipeline stages |
Type of processor core(s)![]() |
MIPS XBurst |
Number of processor core(s): | single-core |
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Memory Interface(s): | LPDDR SDRAM |
Data Bus Width![]() |
32 bit |
Number of data bus channels: | 1 ch |
Non-volatile Memory Interface![]() |
NAND Flash Interface , NOR Flash Interface |
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Recommended Maximum Clock Frequency: | 1000 MHz max. |
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L1 Instruction Cache per Core![]() |
16 Kbyte I-Cache |
L1 Data Cache per Core![]() |
16 Kbyte D-Cache |
Total L2 Cache![]() |
256 Kbyte L2 |
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Feature Size![]() |
65 nm |
Semiconductor Technology: |
CMOS![]() |
Pins![]() |
379 pins |
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Embedded GPU![]() |
Vivante GC860 GPU |
GPU Clock: | 444 MHz GPU |
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Supported Cellular Data Links![]() |
No |
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Supported GPS protocol(s): | No |
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Special Features: | XBurst SIMD instruction set, 8-stage pipeline, 16/32-bit LP-DDR/DDR/DDR2.. ›› |
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Data Integrity![]() |
Preliminary |
Added![]() |
2011-12-13 15:05 |
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