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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component NVIDIA
Type Tegra 3 T30L
Codename Kal-El
Year Released 2011
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7-A
Pipeline StagesPipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. 8 pipeline stages
Number of processor core(s) 5
Type of processor core(s)Type and allocation of processor core(s) 5x ARM Cortex-A9 MPCore

BusesBuses: 
Memory Interface(s):   mobile (LP) DDR2 SDRAM , DDR3L (LV) SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 667 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 1 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 5.34 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  NAND Flash Interface


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 1300 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 1024 Kbyte L2

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 40 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component TSMC

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). NVIDIA GeForce ULP MP12 GPU
Number of GPU cores 12-core GPU
GPU Clock 416 MHz GPU

Cellular CommunicationCellular Communication: 

Supported Cellular Data LinksList of supported cellular data links  No

Satellite NavigationSatellite Navigation: 

Supported GPS protocol(s):   No

Additional InformationAdditional Information: 
Special Features 4x Cortex-A9 Harvard Superscalar primary core, 1x 500MHz Cortex-A9 Harvard Superscalar companion core, 32KB I-cache + 32KB D-cache per core, 1MB L2 cache in total, 32-bit LP-DDR2-1066 and DDR3-L-1333 SD RAM interface, ARM NEON instruction set, Enhanced NAND Flash support, High Definition Audio Video Processor, NTSC/PAL TV output, HDMI 1.4a, OpenGL ES, OpenVG 1.1, EGL 1.4, 3D Stereo Sound, 32MP camera support, 5MP secondary camera support

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2012-02-27 20:40
 
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