 Generel Characteristics:
|
Designer |
MediaTek |
| Type: |
MT6595M |
| Year Released: |
2014 |
| Function |
Multi-core Application Processor with Modem |
 Architecture:
|
| Width of Machine Word |
32 bit |
| Supported Instruction Set(s): |
ARMv7 |
| Type of processor core(s) |
4x ARM Cortex-A17 MPcore + 4x ARM Cortex-A7 MPcore |
| Number of processor core(s): |
octa-core |
 Buses:
|
| Memory Interface(s): |
LPDDR2 SDRAM
, LPDDR3 SDRAM |
| Data Bus Width |
32 bit |
| Number of data bus channels: |
1 ch |
| Non-volatile Memory Interface |
NAND Flash Interface |
 Clock Frequencies:
|
| Recommended Maximum Clock Frequency: |
2200 MHz max. |
 Cache Memories:
|
| L1 Instruction Cache per Core |
32 Kbyte I-Cache |
| L1 Data Cache per Core |
32 Kbyte D-Cache |
| Total L2 Cache |
2048 Kbyte L2 |
 Technology and Packaging:
|
| Feature Size |
28 nm |
| Semiconductor Technology: |
CMOS |
 Graphical Subsystem:
|
| Embedded GPU |
IMG PowerVR G6200 GPU |
| Number of GPU cores: |
1-core GPU |
| GPU Clock: |
450 MHz GPU |
 Cellular Communication:
|
| Supported Cellular Data Links |
EDGE
, TD-SCDMA
, LTE data links |
 Satellite Navigation:
|
| Supported GPS protocol(s): |
Yes |
| Supported Galileo service(s) |
Yes |
| Supported GLONASS protocol(s) |
Yes |
| Supported BeiDou system (BDS) |
Yes |
 Additional Information:
|
Special Features:
quad 2 GHz ARM Cortex-A17 Harvard Superscalar processor cores, quad 1.5 GHz ARM Cortex-A7 Harvard Superscalar processor cores, big.LITTLE HMP architecture, 512 Kbyte L2 cache per core, integrated Rel. 9, Cat. 4 LTE (FDD & TDD), DC-HSPA+, TD-SCDMA, EDGE baseband.. ›› |
 Datasheet Attributes:
|
| Data Integrity |
Preliminary |
| Added |
2014-09-10 21:44 |
All details | 
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