Generel Characteristics: |
|
Designer | NEC |
Type: | VR5432 |
Year Released: | 2000 |
Function | Application Processor |
Architecture: |
|
Width of Machine Word | 64 bit |
Supported Instruction Set(s): | MIPS I, MIPS II, MIPS III, MIPS IV |
Type of processor core(s) | MIPS R5000 |
Number of processor core(s): | single-core |
Buses: |
|
Memory Interface(s): | Yes |
Data Bus Width | 64 bit |
Number of data bus channels: | 1 ch |
Non-volatile Memory Interface | No |
Clock Frequencies: |
|
Internal Systembus Clock: | 100 MHz |
Recommended Maximum Clock Frequency: | N/A |
Cache Memories: |
|
L1 Instruction Cache per Core | 32 Kbyte I-Cache |
L1 Data Cache per Core | 32 Kbyte D-Cache |
Total L2 Cache | 1024 Kbyte L2 |
Technology and Packaging: |
|
Semiconductor Technology: | CMOS |
Number of Transistors Integrated: | 3700000 |
Graphical Subsystem: |
|
Embedded GPU | N/A |
Cellular Communication: |
|
Supported Cellular Data Links | No |
Additional Information: |
|
Datasheet Attributes: |
|
Data Integrity | Final |
Added | 2006-01-01 06:00 |
Tweet | |