 Generel Characteristics:
|
Designer |
Intel |
| Type: |
Core M 6th Gen m5-6Y54 |
| Codename: |
Skylake |
| Year Released: |
2015 |
| Function |
Multi-core Application Processor |
 Architecture:
|
| Width of Machine Word |
64 bit |
| Supported Instruction Set(s): |
IA-32 (x86), IA-64 (x64), SSE4, SSE 4.1, SSE 4.2, AVX 2.0 |
| Type of processor core(s) |
2x Intel Skylake-Y |
| Number of processor core(s): |
dual-core |
 Buses:
|
| Memory Interface(s): |
DDR3L SDRAM
, LPDDR3 SDRAM |
| Max. Clock Frequency of Memory IF |
933 MHz |
| Data Bus Width |
64 bit |
| Number of data bus channels: |
2 ch |
| Max. Data Rate |
29.86 Gbyte/s |
| Non-volatile Memory Interface |
Yes |
 Clock Frequencies:
|
| Recommended Minimum Clock Frequency: |
1100 MHz min. |
| Recommended Maximum Clock Frequency: |
2700 MHz max. |
 Cache Memories:
|
| L1 Instruction Cache per Core |
32 Kbyte I-Cache |
| L1 Data Cache per Core |
32 Kbyte D-Cache |
| Total L2 Cache |
512 Kbyte L2 |
 Technology and Packaging:
|
| Feature Size |
14 nm |
| Semiconductor Technology: |
CMOS |
| Fab |
Intel |
| Pins |
1515 pins |
 Graphical Subsystem:
|
| Embedded GPU |
Intel Iris Graphics 515 GPU |
| Number of GPU cores: |
24-core GPU |
| GPU Clock: |
300 MHz GPU |
 Cellular Communication:
|
| Supported Cellular Data Links |
No |
 Satellite Navigation:
|
| Supported GPS protocol(s): |
No |
 Additional Information:
|
Special Features:
Dual Intel Core-M Skylake-Y processor cores, 32 Kbyte instruction cache per core, 32 Kbyte data cache per core, 256 Kbyte L2 cache per core, 4 Mbyte SmartCache, dual-channel 64-bit 933 MHz LPDDR3-1866 / 64-bit 800 MHz DDR3L-1600 SD RAM.. ›› |
 Datasheet Attributes:
|
| Data Integrity |
Preliminary |
| Added |
2015-11-30 14:53 |
All details | 
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