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Designer![]() |
DEC |
Type: | StrongARM SA-1100 |
Year Released: | 1997 |
Function![]() |
Application Processor |
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Width of Machine Word![]() |
32 bit |
Supported Instruction Set(s): | ARMv4 |
Number of processor core(s): | 1 |
Type of processor core(s)![]() |
ARM SA-1 |
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Memory Interface(s): | EDO DRAM , SDRAM |
Data Bus Width![]() |
32 bit |
Number of data bus channels: | 1 ch |
Non-volatile Memory Interface![]() |
NOR Flash Interface |
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Internal Systembus Clock: | 66 MHz |
Recommended Maximum Clock Frequency: | 190 MHz max. |
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L1 Instruction Cache per Core![]() |
16 Kbyte I-Cache |
L1 Data Cache per Core![]() |
8 Kbyte D-Cache |
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Feature Size![]() |
350 nm |
Semiconductor Technology: |
CMOS![]() |
Number of Transistors Integrated: | 2500000 |
Pins![]() |
208 pins |
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Embedded GPU![]() |
N/A |
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Supported Cellular Data Links![]() |
No |
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Supported GPS protocol(s): | No |
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Special Features: embedded flash ROM, FPM / EDO DRAM / SDRAM / SRAM interface, flash ROM / ROM interface, MMU, Write buffer, Read buffer, LCD controller, serial I/O, PCMCIA controller |
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Data Integrity![]() |
Final |
Added![]() |
2016-08-17 21:53 |
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