|
|
Designer |
Apple |
| Type: | A10X Fusion APL1071 / APL1W71 |
| Codename: | T8011 |
| Year Released: | 2017 |
| Function |
SoC |
|
|
| Width of Machine Word |
64 bit |
| Supported Instruction Set(s): | ARMv8-A (A32, A64) |
| Type of processor core(s) |
3x Apple Hurricane + 3x Zephyr cores |
| Number of processor core(s): | quad-core |
|
|
| Memory Interface(s): | LPDDR4 SDRAM |
| Max. Clock Frequency of Memory IF |
1600 MHz |
| Data Bus Width |
64 bit |
| Number of data bus channels: | 2 ch |
| Max. Data Rate |
51.2 Gbyte/s |
| Non-volatile Memory Interface |
eMMC 5.1
, moviNAND
, NAND Flash Interface
, SATA |
|
|
| Recommended Maximum Clock Frequency: | 2380 MHz max. |
|
|
| L1 Instruction Cache per Core |
64 Kbyte I-Cache |
| L1 Data Cache per Core |
64 Kbyte D-Cache |
| Total L2 Cache |
3072 Kbyte L2 |
| Total L3 Cache: | 8192 Kbyte L3 |
|
|
| Feature Size |
10 nm |
| Semiconductor Technology: |
CMOS |
| Fab |
TSMC |
|
|
| Embedded GPU |
N/A |
| Number of GPU cores: | 12-core GPU |
|
|
| Supported Cellular Data Links |
No |
|
|
| Supported GPS protocol(s): |
GPS |
| Supported GLONASS protocol(s) |
Yes |
| Supported BeiDou system (BDS) |
B1I BeiDou receiver |
|
|
| Special Features: | 3x high-performance Apple Hurricane 64-bit ARMv8-compatible (AArch32-AArch64) Harvard.. ›› |
|
|
| Data Integrity |
Preliminary |
| Added |
2017-06-06 18:48 |
| Tweet | |
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Device Specs 
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