Generel Characteristics:
|
Designer |
Apple |
Type: |
A12 Bionic APL1081 / APL1W81 |
Codename: |
T8020 |
Year Released: |
2018 |
Function |
Application Processor |
Architecture:
|
Width of Machine Word |
64 bit |
Supported Instruction Set(s): |
ARMv8.3 (A32, A64) |
Number of processor core(s): |
6 |
Type of processor core(s) |
2x Apple Vortex + 4x Apple Tempest cores |
Buses:
|
Memory Interface(s): |
LPDDR4x SDRAM |
Data Bus Width |
64 bit |
Number of data bus channels: |
2 ch |
Non-volatile Memory Interface |
eMMC 5.1
, moviNAND
, NAND Flash Interface
, SATA |
Clock Frequencies:
|
Recommended Maximum Clock Frequency: |
2496 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core |
128 Kbyte I-Cache |
L1 Data Cache per Core |
128 Kbyte D-Cache |
Number of L1 Cache Ways: |
8-way |
Total L2 Cache |
8192 Kbyte L2 |
Technology and Packaging:
|
Feature Size |
7 nm |
Semiconductor Technology: |
CMOS |
Number of Transistors Integrated: |
6900000000 |
Fab |
TSMC |
Graphical Subsystem:
|
Embedded GPU |
Apple A12 GPU |
Number of GPU cores: |
4-core GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Satellite Navigation:
|
Supported GPS protocol(s): |
GPS (NMEA 0183) |
Supported Galileo service(s) |
Yes |
Supported GLONASS protocol(s) |
Yes |
Supported BeiDou system (BDS) |
B1I BeiDou receiver |
Additional Information:
|
Special Features: 2x high-performance Apple Vortex 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores + 4x high-efficiency Apple Tempest 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (32 KB L1 data cache per core, 32 KB L1 instruction cache per core), HMP, ARM VFPv4, HDMI, 2160p video encode, 2160p video decode, OpenCL 2.0, OpenGL 3.0, Vulkan 1.1, DirectX 12 |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added |
2018-09-13 21:12 |