Generel Characteristics:
Designer	Apple
Type:	M2 APL1109 / APL1W09
Codename:	T8112
Year Released:	2022
Function	SoC
Expand datasheet \| Add to compare Architecture:
Width of Machine Word	64 bit
Supported Instruction Set(s):	ARMv8.6-A (A32, A64)
Type of processor core(s)	4x Apple Avalanche + 4x Apple Blizzard cores
Number of processor core(s):	octa-core
Buses:
Address Bus Width	32 bit
Memory Interface(s):	LPDDR5 SDRAM
Max. Clock Frequency of Memory IF	3200 MHz
Data Bus Width	64 bit
Number of data bus channels:	2 ch
Max. Data Rate	102.4 Gbyte/s
Non-volatile Memory Interface	eMMC 5.1 , moviNAND , NAND Flash Interface , SATA , SATA II , SATA III , UFS 3.1 , UFS 3.1 2-lane
Clock Frequencies:
Recommended Maximum Clock Frequency:	3490 MHz max.
Cache Memories:
L1 Instruction Cache per Core	192 Kbyte I-Cache
L1 Data Cache per Core	128 Kbyte D-Cache
Total L2 Cache	20480 Kbyte L2
Total L3 Cache:	8192 Kbyte L3
Technology and Packaging:
Feature Size	5 nm
Semiconductor Technology:	CMOS
Number of Transistors Integrated:	20000000000
Fab	TSMC
Graphical Subsystem:
Embedded GPU	Apple M2 GPU
Number of GPU cores:	10-core GPU
GPU Clock:	1398 MHz GPU
Expand datasheet Cellular Communication:
Supported Cellular Data Links	No
Satellite Navigation:
Supported GPS protocol(s):	GPS
Supported Galileo service(s)	Yes
Supported GLONASS protocol(s)	Yes
Supported BeiDou system (BDS)	B1I BeiDou receiver
Additional Information:
Special Features: 4x high-performance Apple Avalanche 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (up to 3490 MHz, 192 KiB of L1 instruction cache per core, 128 KiB of L1 data cache per core, 16 MiB shared L2 cache) + 4x high-efficiency Apple.. ››
Datasheet Attributes:
Data Integrity	Final
Added	2022-12-16 21:38

Apple M2 APL1109 / APL1W09 (T8112)

Predecessor

Apple M1 APL1102 / APL1W02 (T8103)

2020, 64 bit, octa-core, 192 Kbyte I-Cache, 128 Kbyte D-Cache, 16384 Kbyte L2, 16384 Kbyte L3, 5 nm, Apple M1 GPU |