Generel Characteristics: |
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Designer | Apple |
Type: | A12 Bionic APL1081 / APL1W81 |
Codename: | T8020 |
Year Released: | 2018 |
Function | Application Processor |
Architecture: |
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Width of Machine Word | 64 bit |
Supported Instruction Set(s): | ARMv8.3 (A32, A64) |
Type of processor core(s) | 2x Apple Vortex + 4x Apple Tempest cores |
Number of processor core(s): | hexa-core |
Buses: |
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Memory Interface(s): | LPDDR4x SDRAM |
Data Bus Width | 64 bit |
Number of data bus channels: | 2 ch |
Non-volatile Memory Interface | eMMC 5.1 , moviNAND , NAND Flash Interface , SATA |
Clock Frequencies: |
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Recommended Maximum Clock Frequency: | 2496 MHz max. |
Cache Memories: |
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L1 Instruction Cache per Core | 128 Kbyte I-Cache |
L1 Data Cache per Core | 128 Kbyte D-Cache |
Total L2 Cache | 8192 Kbyte L2 |
Technology and Packaging: |
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Feature Size | 7 nm |
Semiconductor Technology: | CMOS |
Number of Transistors Integrated: | 6900000000 |
Fab | TSMC |
Graphical Subsystem: |
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Embedded GPU | Apple A12 GPU |
Number of GPU cores: | 4-core GPU |
Cellular Communication: |
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Supported Cellular Data Links | No |
Additional Information: |
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Special Features: 2x high-performance Apple Vortex 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores + 4x high-efficiency Apple Tempest 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (32 KB L1 data cache per core, 32 KB L1 instruction cache per core), HMP, ARM VFPv4,.. ›› |
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Datasheet Attributes: |
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Data Integrity | Preliminary |
Added | 2018-09-13 21:12 |
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